formatting

src/assembler.rs

@@ -75,7 +75,7 @@ pub fn assembler(source: &str) -> Vec<u8> {
         match tokens[0].as_str() {
             "mov" => {
                 // mov reg, imm
-                let r1= parse_reg(&tokens[1]);
+                let r1 = parse_reg(&tokens[1]);
                 if is_reg(&tokens[2]) {
                     let r2 = parse_reg(&tokens[2]);
                     bytes.push(Instruction::MOV_RR as u8);
@@ -104,7 +104,6 @@ pub fn assembler(source: &str) -> Vec<u8> {
                     bytes.push(r1);
                     bytes.push(imm);
                 }
-
             }
 
             "sub" => {
@@ -161,7 +160,6 @@ pub fn assembler(source: &str) -> Vec<u8> {
                 bytes.push(Instruction::MUL as u8);
                 bytes.push(r1);
                 bytes.push(r2);
-
             }
 
             "div" => {
@@ -174,9 +172,7 @@ pub fn assembler(source: &str) -> Vec<u8> {
             }
 
             "call" => {
-                let addr = *symbols
-                    .get(&tokens[1])
-                    .expect("Unknown label");
+                let addr = *symbols.get(&tokens[1]).expect("Unknown label");
 
                 bytes.push(Instruction::CALL as u8);
                 bytes.push((addr & 0xFF) as u8); // low

src/cpu.rs

@@ -89,7 +89,6 @@ impl CPU {
         self.sp = self.sp.wrapping_sub(1);
     }
 
-
     pub fn halt(&mut self) {
         self.halted = true;
     }
@@ -114,7 +113,7 @@ impl CPU {
     pub fn mov_rr(&mut self, mem: &Memory) {
         let dest = mem.read(self.pc);
         self.inc_pc();
-        let src= mem.read(self.pc);
+        let src = mem.read(self.pc);
         self.inc_pc();
 
         let val = self.get_reg(src);
@@ -123,7 +122,6 @@ impl CPU {
         self.zero = val == 0;
     }
 
-
     pub fn add_rr(&mut self, mem: &Memory) {
         let dest = mem.read(self.pc);
         self.pc += 1;
@@ -166,7 +164,6 @@ impl CPU {
         self.carry = carry;
     }
     pub fn add_ri(&mut self, mem: &Memory) {
-
         let dest = mem.read(self.pc);
         self.pc += 1;
         let imm = mem.read(self.pc);
@@ -192,7 +189,6 @@ impl CPU {
         self.carry = carry;
     }
 
-
     pub fn sub_rr(&mut self, mem: &Memory) {
         let dest = mem.read(self.pc);
         self.pc += 1;
@@ -261,7 +257,6 @@ impl CPU {
         self.carry = borrow;
     }
 
-
     pub fn jmp(&mut self, mem: &Memory) {
         let low = mem.read(self.pc) as u16;
         self.inc_pc();
@@ -329,8 +324,10 @@ impl CPU {
     }
 
     pub fn mul(&mut self, mem: &Memory) {
-        let dest = mem.read(self.pc); self.inc_pc();
-        let src  = mem.read(self.pc); self.inc_pc();
+        let dest = mem.read(self.pc);
+        self.inc_pc();
+        let src = mem.read(self.pc);
+        self.inc_pc();
 
         let lhs = self.get_reg(dest);
         let rhs = self.get_reg(src);
@@ -345,8 +342,10 @@ impl CPU {
     }
 
     pub fn div(&mut self, mem: &Memory) {
-        let dest = mem.read(self.pc); self.inc_pc();
-        let src  = mem.read(self.pc); self.inc_pc();
+        let dest = mem.read(self.pc);
+        self.inc_pc();
+        let src = mem.read(self.pc);
+        self.inc_pc();
 
         let lhs = self.get_reg(dest);
         let rhs = self.get_reg(src);
@@ -365,16 +364,17 @@ impl CPU {
         // carry unchanged
     }
 
-    pub fn call(&mut self, mem: &mut Memory ) {
-        let low  = mem.read(self.pc) as u16; self.inc_pc();
-        let high = mem.read(self.pc) as u16; self.inc_pc();
+    pub fn call(&mut self, mem: &mut Memory) {
+        let low = mem.read(self.pc) as u16;
+        self.inc_pc();
+        let high = mem.read(self.pc) as u16;
+        self.inc_pc();
         let addr = (high << 8) | low;
 
         let return_addr = self.pc;
 
         self.push16(mem, return_addr);
         self.pc = addr;
-
     }
 
     pub fn ret(&mut self, mem: &mut Memory) {
@@ -382,7 +382,6 @@ impl CPU {
         self.pc = addr;
     }
 
-
     pub fn syscall(&mut self, mem: &Memory) {
         let num = mem.read(self.pc);
         self.pc = self.pc.wrapping_add(1);
@@ -422,5 +421,4 @@ impl CPU {
             _ => panic!("Invalid register"),
         }
     }
-
 }

src/instructions.rs

@@ -21,7 +21,7 @@ pub enum Instruction {
 }
 
 impl Instruction {
-    pub  fn opcode_name(op: u8) -> &'static str{
+    pub fn opcode_name(op: u8) -> &'static str {
         match op {
             0x01 | 0x08 => "MOV",
             0x02 | 0x0A => "ADD",

src/main.rs

@@ -5,10 +5,10 @@ mod memory;
 
 use std::io;
 
+use crate::assembler::assembler;
+use clap::Parser;
 use cpu::CPU;
 use memory::Memory;
-use clap::Parser;
-use crate::assembler::assembler;
 
 #[derive(Parser, Debug)]
 #[command(version, about, long_about = None)]
@@ -17,11 +17,13 @@ struct Args {
     filename: String,
 }
 
-
 fn main() {
     let args = Args::parse();
 
-    let mut cpu = CPU {sp: 0xFFFE, ..Default::default( )};
+    let mut cpu = CPU {
+        sp: 0xFFFE,
+        ..Default::default()
+    };
     let mut mem = Memory::new();
 
     let asm = std::fs::read_to_string(args.filename).unwrap();