diff --git a/README.md b/README.md
new file mode 100644
index 0000000..b9d68f2
--- /dev/null
+++ b/README.md
@@ -0,0 +1,10 @@
+# 8-Bit CPU Simulator
+
+## Added instructions
+1. MOV
+2. ADD
+3. SUB
+4. JMP (Jump)
+5. JZ (Jump if zero)
+5. JZ (Jump if not zero)
+6. HLT (Halt)
diff --git a/src/cpu.rs b/src/cpu.rs
index 96ede96..124d391 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -153,4 +153,17 @@ impl CPU {
 
     }
 
+ pub fn jnz(&mut self, mem: &mut Memory) {
+        let low = mem.read(self.pc) as u16; self.inc_pc();
+        let high = mem.read(self.pc) as u16; self.inc_pc();
+
+        let addrs = (high << 8) | low;
+
+        if !self.zero {
+            self.pc = addrs;
+        }
+
+    }
+
+
 }
diff --git a/src/instructions.rs b/src/instructions.rs
index f5884dc..acfb8bd 100644
--- a/src/instructions.rs
+++ b/src/instructions.rs
@@ -5,5 +5,6 @@ pub enum Instruction {
     SUB = 0x03,
     JMP = 0x04,
     JZ = 0x05,
+    JNZ = 0x06,
     HLT = 0xFF,
 }
diff --git a/src/main.rs b/src/main.rs
index efbf5f7..24a43ae 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -20,7 +20,7 @@ fn main() {
     // b = 2
     mem.write(0x0003, Instruction::MOV as u8);
     mem.write(0x0004, 1);
-    mem.write(0x0005, 5);
+    mem.write(0x0005, 3);
 
     // a = a + b
     mem.write(0x0006, Instruction::SUB as u8);
@@ -28,7 +28,7 @@ fn main() {
     mem.write(0x0008, 1);
 
     // JMP to halt
-    mem.write(0x0009, Instruction::JZ as u8);
+    mem.write(0x0009, Instruction::JNZ as u8);
     mem.write(0x000a, 0x0f); // Low
     mem.write(0x000b, 0x00); // High
 
@@ -50,6 +50,7 @@ fn main() {
             x if x == Instruction::SUB as u8 => cpu.sub(&mut mem),
             x if x == Instruction::JMP as u8 => cpu.jmp(&mut mem),
             x if x == Instruction::JZ  as u8 => cpu.jz(&mut mem),
+            x if x == Instruction::JNZ  as u8 => cpu.jnz(&mut mem),
             x if x == Instruction::HLT as u8 => cpu.halt(),
             _ => panic!("Unknown opcode {:02X}", opcode),
         }