krolxon
|
3372e774e9
|
add MUL & DIV
|
2026-01-08 18:47:07 +05:30 |
krolxon
|
deac6a4448
|
add add_ri, sub_ri
|
2026-01-05 19:46:19 +05:30 |
krolxon
|
4166b0e543
|
add cmp instruction, add reg, reg, and reg, imm variations
|
2026-01-05 13:15:01 +05:30 |
krolxon
|
8d479202b0
|
add labels, improve documentation, add step debug
|
2026-01-05 12:12:57 +05:30 |
krolxon
|
debe2ecbc4
|
add simple assembler
|
2026-01-04 23:49:04 +05:30 |
krolxon
|
d05f2980db
|
add code formatting
|
2026-01-04 19:18:53 +05:30 |
krolxon
|
6e317ee063
|
mov instruction must set the zero flag appropriately to avoid desyncing
|
2026-01-04 19:17:15 +05:30 |
krolxon
|
be61e5ae6b
|
add jnz, README.md
|
2026-01-04 19:10:23 +05:30 |
krolxon
|
244172960f
|
add jmp, jz
|
2026-01-04 19:06:42 +05:30 |
krolxon
|
798ac8ce75
|
refactor the cpu logic to cpu module
|
2026-01-04 18:47:43 +05:30 |
krolxon
|
4809d7159f
|
initial commit
|
2026-01-04 18:39:25 +05:30 |